发明名称 In service programmable logic arrays with low tunnel barrier interpoly insulators
摘要 Structures and methods for in service programmable logic arrays with low tunnel barrier interpoly insulators are provided. The in-service programmable logic array includes a first logic and a second logic plan having a number of logic cells arranged in rows and columns that are interconnected to produce a number of logical outputs such that the in service programmable logic array implements a logical function. The logic cell includes a first source/drain region and a second source/drain region separated by a channel region in a substrate. A floating gate opposing the channel region and is separated therefrom by a gate oxide. A control gate opposes the floating gate. The control gate is separated from the floating gate by a low tunnel barrier intergate insulator. The low tunnel barrier intergate insulator includes a metal oxide insulator selected from the group consisting of PbO, Al<SUB>2</SUB>O<SUB>3</SUB>, Ta<SUB>2</SUB>O<SUB>5</SUB>, TiO<SUB>2</SUB>, ZrO<SUB>2</SUB>, Nb<SUB>2</SUB>O<SUB>5 </SUB>and/or a Perovskite oxide tunnel barrier.
申请公布号 US7087954(B2) 申请公布日期 2006.08.08
申请号 US20010945512 申请日期 2001.08.30
申请人 MICRON TECHNOLOGY, INC. 发明人 FORBES LEONARD
分类号 H01L29/788;G11C16/04;H01L21/8247;H01L27/115;H01L29/423;H01L29/51;H03K19/177 主分类号 H01L29/788
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