发明名称 Communication apparatus
摘要 The hardware configuration of a baseband block in a radio communication system is reduced in gate size. Modulation/demodulation processing in a baseband block is divided into a plurality of processing units, which are connected to one another by buffer memories. The hardware gate sizes are reduced by performing processing on a plurality of channels by time division multiplexing at a speed higher than the speed at which received signals are written into the buffer memories.
申请公布号 US7088696(B1) 申请公布日期 2006.08.08
申请号 US19990427595 申请日期 1999.10.27
申请人 HITACHI LTD 发明人 KAWABE MANABU;SUZUKI MAY;HANAOKA SEISHI;DOI NOBUKAZU
分类号 H04B7/216;H04J13/00;H04B1/707;H04Q7/38 主分类号 H04B7/216
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