发明名称 Semiconductor device having reduced capacitance to substrate and method
摘要 In one embodiment, a matrix of free-standing semiconductor shapes are oxidized to form a low capacitance isolation tub. The adjacent rows of shapes in the matrix are offset with respect to each to minimize air gap and void formation during tub formation. In a further embodiment, the spacing between adjacent rows is less than the spacing between shapes within a row.
申请公布号 US7087925(B2) 申请公布日期 2006.08.08
申请号 US20040773853 申请日期 2004.02.09
申请人 SEMICONDUCTOR COMPONENTS INDUSTRIES, L.L.C. 发明人 GRIVNA GORDON M.
分类号 H01L21/76;H01L29/00;H01L21/02;H01L21/316;H01L21/762;H01L21/763;H01L21/822;H01L27/04;H01L29/06 主分类号 H01L21/76
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