发明名称 Universal test platform and test method for latch-up
摘要 A method for testing latch-up phenomenon of a chip is provided. The chip is tested on a test platform, the test platform storing a test program of the chip for testing the chip. The method includes (a) obtaining the test program of the chip tested on the test platform, (b) obtaining pin data of the chip by the test program of the chip, (c) setting up an input pin of the chip with an initial value, and (d) providing a test current to the pin of the chip, and then measuring the current between a power end and a ground end of the chip to see if it exceeds a first predetermined value.
申请公布号 US7089137(B2) 申请公布日期 2006.08.08
申请号 US20040709425 申请日期 2004.05.05
申请人 FARADAY TECHNOLOGY CORP. 发明人 WANG JIE-HONG;KO KAI-JEN;CHENG AN-RU
分类号 G01R31/14;G01R31/28 主分类号 G01R31/14
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