发明名称 Semiconductor multi-package module having wire bond interconnect between stacked packages
摘要 A semiconductor multi-package module having stacked lower and upper packages, each package including a die attached to a substrate, in which the upper and lower substrates are interconnected by wire bonding. Also, a method for making a semiconductor multi-package module, by providing a lower molded package including a lower substrate and a die, affixing an upper molded package including an upper substrate onto the upper surface of the lower package, and forming z-interconnects between the upper and lower substrates.
申请公布号 US2006172463(A1) 申请公布日期 2006.08.03
申请号 US20060374468 申请日期 2006.03.13
申请人 CHIPPAC, INC. 发明人 KARNEZOS MARCOS
分类号 H01L21/50;H01L23/31;H01L23/433;H01L25/065;H01L25/10 主分类号 H01L21/50
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