| 摘要 |
An integrated circuit chip includes multiple functional components and a central interconnect module providing communication among the functional components. The central interconnect module includes a buffer which is shared by the sending and receiving components. Preferably, some components perform different functions and communicate with the central interconnect via a common architectural interface. Preferably, each sender is allocated respective credits representing ability of the receiver to receive data (e.g., available buffer space), and the sender can transmit data if it has credits. Credits are decremented when the sender sends data, and returned by the receiver when is again able to receive. The use of a common central interconnect module with a shared buffer reduces buffer requirements and provides a low-overhead path for transferring data within the integrated circuit chip.
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