| 摘要 |
PROBLEM TO BE SOLVED: To provide an automated design system for semiconductor device capable of suppressing clock skew without the need of any additional circuit, even in a semiconductor device formed of a wiring made of a semiconductor material and formed of a single-layered metal wiring. SOLUTION: There are provided predetermined wiring information input means for inputting predetermined wiring information between predetermined circuits, and layout alteration means for altering layout data on the basis of the predetermined wiring information. As a result, the clock skew between the predetermined circuits is reduced. COPYRIGHT: (C)2006,JPO&NCIPI
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