发明名称 |
Decoupling capacitance analysis method |
摘要 |
This method for decoupling capacitance analysis improves upon existing techniques to attempt to give a more accurate representation of the power supply fluctuations on a chip while keeping runtime comparable. This method employs the following techniques: 1. A method for descending through hierarchy and dividing the design into a variable sized grid. 2. An algorithm to determine which grid locations of a design don't have enough decoupling capacitors for all of the devices in that grid location. 3. An algorithm to determine which grid locations are subject to harmful neighboring effects. 4. A method to display the results of the calculations in a graphical manor to allow easy identification of problem areas.
|
申请公布号 |
US7086026(B2) |
申请公布日期 |
2006.08.01 |
申请号 |
US20030436393 |
申请日期 |
2003.05.12 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
BERRY CHRISTOPHER J.;SMITH HOWARD H.;UNDERWOOD RICHARD P.;WAGSTAFF ALAN P. |
分类号 |
G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|