发明名称 Method for manufacturing semiconductor integrated circuit device
摘要 It is desirable to prevent breakage and separation of wiring of a semiconductor integrated circuit device, such as a bit-line of a DRAM. To accomplish this, disclosed is a method in which, e.g., a high density plasma silicon oxide film is deposited on wirings (e.g., a bit-line that is connected to the source and drain region of a memory cell selection MISFET of a DRAM memory cell) by means of a high density plasma CVD technique, at a first temperature, and the structure is subjected to RTA (heat treatment) at a second temperature higher than the first temperature (e.g., 750° C.). Via holes are then formed in the high density plasma silicon oxide film, and first and second conductive films are then formed, the first conductive film being formed in the via holes and at a third temperature lower than the first temperature. The first and second conductive layers are then polished to remain selectively within the via holes. In heat treating the high density plasma silicon oxide film, the temperature is raised from the first temperature to the second temperature at a maximum speed of 60° C./second or less.
申请公布号 US7084055(B2) 申请公布日期 2006.08.01
申请号 US20040930845 申请日期 2004.09.01
申请人 HITACHI TOHBU SEMICONDUCTOR, LTD. 发明人 FUJIWARA TSUYOSHI;ASAKA KATSUYUKI;NARIYOSHI YASUHIRO;HOSHINO YOSHINORI;OOMORI KAZUTOSHI
分类号 H01L21/4763;H01L21/02;H01L21/316;H01L21/3205;H01L21/768;H01L21/8242;H01L23/522;H01L27/108 主分类号 H01L21/4763
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