发明名称 Dynamic phase logic gate
摘要 A logic device for use with data signals having a continuously or semi-continuously varying waveform of substantially fixed frequency. The device provides a logical output from at least one of the data inputs and comprising a first pair of inputs each to receive a data signal having one of a predetermined set of values representing analog, discrete, or digital states. A combiner stage is used to combine the inputs and produce a signal therefrom. A filter stage is utilized to receive the signal and produce a conditioned signal representative of one of a pair of binary states. The conditioned signal is combined with a second control input. The resultant signal is passed to an output.
申请公布号 US7085029(B2) 申请公布日期 2006.08.01
申请号 US20030351595 申请日期 2003.01.27
申请人 ROMANIUK CHARLES 发明人 ROMANIUK CHARLES
分类号 G06E1/00;G02F3/00;H03K19/02 主分类号 G06E1/00
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