SEMICONDUCTOR INTEGRATED CIRCUIT HAVING LAYOUT IN WHICH BUFFERS OR PROTECTION CIRCUITS ARE ARRANGED IN CONCENTRATED MANNER,申请号KR20060008212-传众专利搜索

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发明名称	SEMICONDUCTOR INTEGRATED CIRCUIT HAVING LAYOUT IN WHICH BUFFERS OR PROTECTION CIRCUITS ARE ARRANGED IN CONCENTRATED MANNER
摘要
申请公布号	KR20060086880(A)	申请公布日期	2006.08.01
申请号	KR20060008212	申请日期	2006.01.26
申请人	RENESAS TECHNOLOGY CORP.	发明人	NAKAMURA TADASHI;SAKAKIBARA KIYOHIKO;TAKIKAWA YUTAKA
分类号	H01L21/77	主分类号	H01L21/77
代理机构		代理人
主权项
地址

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