发明名称 METHOD, APPARATUS, AND SYSTEM FOR CROSSING CLOCK DOMAIN BOUNDARIES
摘要 <p>A method and apparatus that expands the data envelope of captured data to a predetermined number of clocks cycles. The predetermined number of clock cycles is large enough to ensure that an internally generated master clock edge remains within the data envelope over the entire operating range. This way, captured data remains valid and can be properly transferred to the master clock domain from a capture clock domain despite temperature and voltage variations that may effect the timing of the memory device.</p>
申请公布号 KR100607773(B1) 申请公布日期 2006.08.01
申请号 KR20037002588 申请日期 2003.02.21
申请人 发明人
分类号 G11C11/40;G11C11/407;G11C7/10;G11C7/22;G11C11/401;G11C11/4076 主分类号 G11C11/40
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