发明名称 MULTILAYER WIRING BOARD AND ITS PRODUCTION PROCESS
摘要 <p><P>PROBLEM TO BE SOLVED: To obtain a multilayer wiring board in which the height of lands being formed on a surface for mounting a chip electronic component can be made constant substantially and internal formation of a via hole is not impeded, and to provide its production process comprising simple production steps. <P>SOLUTION: The multilayer wiring board comprises a multilayer substrate body 10 composed of ceramic green sheets 11-14, internal conductor layers 21-24 and level difference matching layers 31-33 and having an upper surface 10a for mounting a chip electronic component, and a plurality of lands 25-28 formed on the mounting surface 10a. The level difference matching layers 31-33 has at least one pair of lands 25, 26 and 27, 28 formed to have the substantially same height in the multilayer substrate body 10 corresponding to the lower part of regions a, c, d in which the lands 25, 27, 28 are formed. <P>COPYRIGHT: (C)2006,JPO&NCIPI</p>
申请公布号 JP2006196535(A) 申请公布日期 2006.07.27
申请号 JP20050004134 申请日期 2005.01.11
申请人 MURATA MFG CO LTD 发明人 KAWABATA HIROYUKI;KATOU MITSUHIDE
分类号 H05K3/46 主分类号 H05K3/46
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