发明名称 CLOCK GENERATION METHOD AND CLOCK GENERATION CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To provide a clock generation method and a clock generation circuit, wherein uniform spectrum spread is effectively achieved with simple configuration. <P>SOLUTION: When a PLL circuit and a modulator are used and a frequency division ratio of a frequency divider for feedback in the PLL circuit is changed in accordance with modulation data generated on the basis of a modulation profile of the modulator, to perform spectrum spread by frequency modulation, a turnaround point of the modulation profile is moved to distribute frequency frequencies and the spread spectrum is spread again. The clock generation circuit comprises the PLL circuit and the modulator, and the modulator is provided with a multiple modulation profile generation circuit, and the turnaround point of the modulation profile is moved to distribute frequency frequencies, whereby the spread spectrum is spread again. <P>COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006197308(A) 申请公布日期 2006.07.27
申请号 JP20050007422 申请日期 2005.01.14
申请人 RENESAS TECHNOLOGY CORP 发明人 KAMIMURA YASUHIRO;NAKAMURA HOMARE;KATSUSHIMA AKIO;FUNATSU MAKOTO
分类号 H03L7/183;G06F1/04;H03C3/00;H03K3/84;H03L7/18;H03M3/02;H04B1/69;H04B1/707 主分类号 H03L7/183
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