发明名称 DEVICE FOR SYNCHRONIZATION BY CYCLES
摘要 FIELD: electric communications, possible use in receiving devices for synchronization by cycles of system for transferring discontinuous messages. ^ SUBSTANCE: device contains synchronization signal recognition device, forbidding element, first AND element, adder, shift registers block, generator of clock pulses, OR element, cycles counter, counter of distorted synchronization signals, block for selecting allowed number of distorted synchronization signals, block for selecting threshold, block for selecting counting coefficient, counter by exit from synchronization status, and also solving assembly, containing first comparison block, memory block, subtraction block, second comparison block, comparison counter, second AND element, third AND element, second OR element. ^ EFFECT: increased reliability of operation of device for synchronization by cycles due to excluded possibility of overflow of shift registers block in synchronous operation mode. ^ 1 dwg
申请公布号 RU2280956(C1) 申请公布日期 2006.07.27
申请号 RU20050103006 申请日期 2005.02.07
申请人 FEDERAL'NYJ NAUCHNO-PROIZVODSTVENNYJ TSENTR OTKRYTOE AKTSIONERNOE OBSHCHESTVO "NAUCHNO-PROIZVODSTVENNOE OB"EDINENIE "MARS" (FNPTS OAO "NPO "MARS") 发明人 KAL'NIKOV VLADIMIR VIKTOROVICH;BEREZHNOJ SERGEJ LEONIDOVICH;AGEEV SERGEJ ALEKSANDROVICH;BODROV SERGEJ ALEKSEEVICH;EGOROV JURIJ PETROVICH
分类号 H04L7/08 主分类号 H04L7/08
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