| 摘要 |
A multilayer interconnection board ( 10 ) comprises a dielectric substrate ( 11 ), a through-hole ( 15 ), a signal line ( 12 ) having a large width section ( 12 A) and a small width section ( 12 B) connected with the through-hole ( 15 ), and a ground layer ( 13, 14 ). A length L (mm) of the small width section ( 12 B) meets the formula of 0<L<=(3x10<SUP>10</SUP>)/(Fx√epsilon), wherein, epsilon denotes the dielectric constant of the dielectric substrate ( 11 ) and F (Hz) denotes the frequency of a signal transmitted through the signal line ( 12 ). The ratio (W 2 /W 1 ) of a line width W 2 of the small width section ( 12 B) relative to a line width W 1 of the large width section ( 12 A) is determined to be smaller as the length of a stub portion of the through-hole ( 15 ) becomes larger.
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