发明名称 SRAM MEMORY DEVICE CAPABLE OF PERFORMING BURST OPERATION
摘要 PROBLEM TO BE SOLVED: To provide an SRAM memory device capable of performing a burst operation for simultaneously writing/reading n-bit (n is a natural number) data by one word line selection. SOLUTION: The memory device is provided with a memory block and j (j is a natural number) peripheral circuit parts. The memory block is provided with j submemory blocks for writing/reading 1-bit data in response to one selected word line. The j peripheral circuit parts control data input/output corresponding to j subememory blocks, and controls the reading/writing of some data stored in response to a flag signal when a new writing/reading command is issued especially before the completion of a burst operation and only some of the n-bit data are stored in the peripheral circuit parts. As a result, data input/output control by a burst stop is enabled without increasing separate circuits or complexity. Increase in efficiency, consumed electric current reduction, and operational speed improvement of burst operation are carried out. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006196166(A) 申请公布日期 2006.07.27
申请号 JP20060007866 申请日期 2006.01.16
申请人 SAMSUNG ELECTRONICS CO LTD 发明人 JO HIDETAKE
分类号 G11C11/413;G11C11/417 主分类号 G11C11/413
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