| 摘要 |
PROBLEM TO BE SOLVED: To facilitate suppression of the current variation rate (di/dt) of each power semiconductor at the time of on/off driving and to reduce failure of each power semiconductor by shortening the time when it is in unbalanced state while reducing loss at the time of turn off thereby equalizing the load being applied to each power semiconductor. SOLUTION: In close vicinity of the gate of first and second IGBTs 4 and 5 arranged in a power converter circuit 3, first and second capacitors 17 and 19 are connected with the gate and emitter of the first and second IGBTs 4 and 5. COPYRIGHT: (C)2006,JPO&NCIPI
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