| 摘要 |
According to one embodiment, a signal from a power supply line is caused to pass through a high pass filter, and a first signal is generated by adding a voltage-divided signal to the signal. In addition, a second signal obtained by adding the voltage-divided signal to an identification voltage is generated. A comparator outputs a comparison result of comparing a voltage of the first signal with a voltage of the second signal, and a counter counts up a count value when the voltage of the first signal is higher than that of the second signal. A sample hold circuit sample-holds the count value just before the counter is reset. |
