发明名称 High voltage SOI semiconductor device
摘要 In an SOI (Silicon-On-Insulator) semiconductor device (200), a first semiconductor layer (3) overlies a semiconductor substrate (1) so as to sandwich an insulating layer (2), and second (9) and third (11) semiconductor layers are formed on the surface of the first semiconductor layer (3). At the interface between the first semiconductor layer (3) and the insulating layer (2), a fourth semiconductor layer (12) with a conductivity type opposite that of the first semiconductor layer (3) is formed. The fourth semiconductor layer (12) includes an impurity density larger than 3x10 12 /cm 2 and equal to or less than 1x10 17 /cm 2 so as to be not completely depleted even when a reverse bias voltage is applied between the second (9) and third (11) semiconductor layers. The device has a source electrode (13) and a drain electrode (14).
申请公布号 EP1684358(A2) 申请公布日期 2006.07.26
申请号 EP20060005616 申请日期 2000.08.30
申请人 PANASONIC CORPORATION 发明人 UEMOTO, YASUHIRO;YAMASHITA, KATSUSHIGE;MIURA, TAKASHI
分类号 H01L29/74;H01L29/78;H01L21/76;H01L21/762;H01L29/06;H01L29/739;H01L29/786;H01L29/861 主分类号 H01L29/74
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