发明名称 Semiconductor integrated circuit device and test method thereof
摘要 A semiconductor integrated circuit device includes a test target circuit, a control circuit, and an observation circuit. The control circuit generates a reset signal, and an operation mode signal. The observation circuit is controlled by the signals, and receives input data from observation points in the test target circuit. The observation circuit includes a plurality of flip-flops. The observation circuit performs a reset operation in response to the reset signal. The observation circuit selectively performs a signature-compression operation, and a serial operation of outputting the test result, in response to the operation mode signal. The signature-compression operation is performed, using input data generated in the test target circuit in accordance with test patterns for a normal functional operation.
申请公布号 US7082559(B2) 申请公布日期 2006.07.25
申请号 US20020091552 申请日期 2002.03.07
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 NOZUYAMA YASUYUKI
分类号 G01R31/28;G01R31/3185;G11C29/40;G11C29/56;H01L21/82;H01L21/822;H01L27/04;H03K19/00 主分类号 G01R31/28
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