发明名称 Substrate via layout to improve bias humidity testing reliability
摘要 A substrate is provided, which has a pattern of voltage supply vias extending through at least a portion of the substrate. Each of a plurality of the voltage supply vias is surrounded by four of the voltage supply vias of a same polarity in four orthogonal directions and by four voltage supply vias of an opposite polarity in four diagonal directions.
申请公布号 US7081672(B1) 申请公布日期 2006.07.25
申请号 US20050073802 申请日期 2005.03.07
申请人 LSI LOGIC CORPORATION 发明人 GOVIND ANAND;THURAIRAJARATNAM ARITHARAN;GHAHGHAHI FARSHAD
分类号 H01L23/34 主分类号 H01L23/34
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