发明名称 Automated analysis of RTL code containing ASIC vendor rules
摘要 A method of automatically analyzing RTL code includes receiving as input RTL code for an integrated circuit design. An RTL platform is selected that incorporates design rules for a vendor of the integrated circuit design. The design rules are displayed from the RTL platform on a graphic user interface. A number of the design rules are selected from the graphic user interface. An analysis is performed in the RTL platform of the RTL code for each of the selected design rules. A result of the analysis is generated as output for each of the selected design rules.
申请公布号 US7082584(B2) 申请公布日期 2006.07.25
申请号 US20030427609 申请日期 2003.04.30
申请人 LSI LOGIC CORPORATION 发明人 LAHNER JUERGEN;ATMAKURI KIRAN;CHATURVEDULA KAVITHA;BALASUBRAMANIAN BALAMURUGAN;DEVINENI KRISHNA;ADUSUMALLI SRINIVAS;FRY RANDALL P.;PIERCE GREGORY A.
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
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