| 发明名称 |
Manufacturing method for electronic device and multiple layer circuits thereof |
| 摘要 |
To provide a planarization method which does not depend upon the size and the density of a wiring pattern and in which a reliable wiring system and a Josephson device can be formed and wiring structure, an insulation layer is planarized by forming a reversal pattern mask of wiring and selectively removing the insulation layer on the wiring.
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| 申请公布号 |
US7081417(B2) |
申请公布日期 |
2006.07.25 |
| 申请号 |
US20040874537 |
申请日期 |
2004.06.24 |
| 申请人 |
INTERNATIONAL SUPERCONDUCTIVITY TECHNOLOGY CENTER, THE JUDICIAL FOUNDATION |
发明人 |
HINODE KENJI;NAGASAWA SHUICHI;KITAGAWA YOSHIHIRO;HIDAKA MUTSUO;TANABE KEIICHI |
| 分类号 |
H01L21/302;H01L21/3105;H01L27/18;H01L39/24 |
主分类号 |
H01L21/302 |
| 代理机构 |
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