发明名称 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR
摘要 PROBLEM TO BE SOLVED: To provide a technique for improving the planarity of a member surface embedded in a plurality of recessed part, without increasing a manufacturing process time. SOLUTION: By arranging a first dummy pattern DP<SB>1</SB>having a relatively large area and a second dummy pattern DP<SB>2</SB>having a relatively small area in a dummy region FA, a dummy pattern can be arranged close to a boundary BL, between an element forming region DA and the dummy region FA. Accordingly, the planarity of the surface of a silicon oxide film embedded in an isolation groove is improved in the whole region of the dummy region FA. Further, by occupying a relatively large region out of the dummy region FA with the first dummy pattern DP<SB>1</SB>, an increase in the amount of data of a mask is suppressed. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006191129(A) 申请公布日期 2006.07.20
申请号 JP20060029888 申请日期 2006.02.07
申请人 RENESAS TECHNOLOGY CORP 发明人 KURODA KENICHI;WATABE KOZO;YAMAMOTO HIROHIKO
分类号 H01L21/76;H01L21/3205;H01L21/8238;H01L23/52;H01L27/08;H01L27/092 主分类号 H01L21/76
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