| 摘要 |
PROBLEM TO BE SOLVED: To provide a method of packaging a semiconductor electronic component and the wiring board of the semiconductor electronic component which can easily prevent a poor connection. SOLUTION: As shown in Figure (a), a plurality of IO lands 11a and a plurality of thermal lands 11b are formed by patterning on an insulation substrate so that they may have areas according to a warping quantity of a BGA chip 20 to be mounted on the wiring board 10. Then, as shown in Figure (b), the BGA chip 20 is sucked by a suction nozzle (not shown in Figure) from the top face (from above) and then is transferred above the wiring board 10 and is mounted thereon. Then, as shown in Figure (c), the wiring board 10 mounted with the BGA chip 20 is transferred into a solder reflow apparatus. In the solder reflow apparatus, the wiring board 10 mounted with the BGA chip 20 is heated at a predetermined temperature to connect IO bumps 21a to the IO lands 11a and thermal bumps 21b to the thermal lands 11b. COPYRIGHT: (C)2006,JPO&NCIPI
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