发明名称 Memory cell and semiconductor integrated circuit device
摘要 A memory cell includes a memory cell section and a switching section. The memory cell section includes first and second inverters which are connected to form a flip-flop, and each of the first and second inverters comprises a load transistor and a drive transistor. The switching section is connected with a word line and configured to operatively disconnect the drive transistors of the first and second inverters from a power source when the word line is driven.
申请公布号 US2006158926(A1) 申请公布日期 2006.07.20
申请号 US20060330140 申请日期 2006.01.12
申请人 NEC ELECTRONICS CORPORATION 发明人 YOKOYAMA YOSHISATO
分类号 G11C11/00 主分类号 G11C11/00
代理机构 代理人
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