发明名称 SRAM HAVING IMPROVED CELL STABILITY AND METHOD THEREFOR
摘要 <p>A SRAM (14) includes a SRAM cell (26), the cell (26) includes a first storage node (N1), a second storage node (N2), and a cross coupled latch (40) including a first primary source current path to the first storage node, a first primary sink current path to the first storage node, a second primary source current path to the second storage node, a second primary sink current path to the second storage node, a fifth primary current path to the first storage node, and a sixth primary current path to the second storage node. During standby and/or a read operation of the SRAM cell (26), one of the fifth primary current path and the sixth primary current path is conductive. During a write operation, the fifth primary current path and the sixth primary current path are non-conductive.</p>
申请公布号 WO2006076113(A1) 申请公布日期 2006.07.20
申请号 WO2005US45208 申请日期 2005.12.14
申请人 FREESCALE SEMICONDUCTOR, INC.;RAMARAJU, RAVINDRARAJ;KENKARE, PRASHANT, U.;SARKER, JOGENDRA, C. 发明人 RAMARAJU, RAVINDRARAJ;KENKARE, PRASHANT, U.;SARKER, JOGENDRA, C.
分类号 G11C11/00 主分类号 G11C11/00
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