发明名称 Methods of forming CMOS constructions
摘要 The invention includes methods for forming electrical connections associated with semiconductor constructions. A semiconductor substrate is provided which has a conductive line thereover, and which has at least two diffusion regions adjacent the conductive line. A patterned etch stop is formed over the diffusion regions. The patterned etch stop has a pair of openings extending through it, with the openings being along a row substantially parallel to an axis of the line. An insulative material is formed over the etch stop. The insulative material is exposed to an etch to form a trench within the insulative material, and to extend the openings from the etch stop to the diffusion regions. At least a portion of the trench is directly over the openings and extends along the axis of the line. An electrically conductive material is formed within the openings and within the trench.
申请公布号 US2006160296(A1) 申请公布日期 2006.07.20
申请号 US20060353592 申请日期 2006.02.14
申请人 TRAN LUAN C;FISHBURN FRED D 发明人 TRAN LUAN C.;FISHBURN FRED D.
分类号 H01L21/8238;H01L21/768 主分类号 H01L21/8238
代理机构 代理人
主权项
地址