发明名称 |
METHOD FOR OPERATING MEMORY DEVICE |
摘要 |
<p><P>PROBLEM TO BE SOLVED: To perform writing/erasing at a high speed/high accuracy by reducing the pulse operations for writing/erasing of a nonvolatile memory. <P>SOLUTION: The method and system for operating bits of memory cells in a memory array includes steps of; applying a first operating pulse intended to place the first cell into a predefined state to a terminal of a first cell; and applying a second operating pulse to a terminal of a second cell; the second operating pulse intended to place the second cell to the predefined state, and to have the pulse characteristic to be a function of the response of the first cell to the first operating pulse. <P>COPYRIGHT: (C)2006,JPO&NCIPI</p> |
申请公布号 |
JP2006190462(A) |
申请公布日期 |
2006.07.20 |
申请号 |
JP20060001351 |
申请日期 |
2006.01.06 |
申请人 |
SAIFUN SEMICONDUCTORS LTD |
发明人 |
MAAYAN EDUARDO;EITAN BOAZ |
分类号 |
G11C16/02;G11C16/34;G11C29/02;G11C29/50 |
主分类号 |
G11C16/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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