发明名称 Memory efficient interleaving
摘要 A method and system using a single interleaver at a either a receiving device or a transmitting device where a first symbol set is read from the single interleaver and concurrently with a second symbol set is written to the single interleaver, and a controller that synchronizes the reading of the first symbol set from the interleaver and the writing of the second symbol set to the interleaver so that a particular symbol of the second symbol set is only written to a location of the interleaver after a particular symbol of the first symbol set has been read from the location. The controller may switch between orders, e.g., row order and column order, of reading and/or writing symbols to the single interleaver when all of the symbols for a particular set of symbols associated with the single interleaver have been read, according to another embodiment.
申请公布号 US2006158367(A1) 申请公布日期 2006.07.20
申请号 US20060378921 申请日期 2006.03.17
申请人 SONY ELECTRONICS INC. 发明人 CHAMPION MARK
分类号 H03M1/36 主分类号 H03M1/36
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