发明名称 Interrupt pre-emption and ordering within a data processing system
摘要 A data processing system nested interrupt controller 24 responsive to priority level values 28, 30 associated with respective interrupt handling programs to control the execution of those interrupt handling programs. The priority level values have a first portion 28 which controls whether or not a pending interrupt handling program will pre-empt an already active interrupt handling program and a second portion 30 which controls which of a plurality of pending interrupt handling programs will be executed next when they share the same value for the first portion of their priority level value.
申请公布号 US7080178(B2) 申请公布日期 2006.07.18
申请号 US20040773452 申请日期 2004.02.09
申请人 ARM LIMITED 发明人 KIMELMAN PAUL;FIELD IAN
分类号 G06F13/24;G06F13/26 主分类号 G06F13/24
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