发明名称 Wafer level burn-in of SRAM
摘要 A wafer level burn-in method for static-random access memory. The SRAM memory has a plurality of word lines and a plurality of bit lines. The SRAM memory also has pull up circuits and equalizer circuits connected to various bit lines. All the word lines are switched on for testing any leakage in the gate dielectric layer. A high potential is applied to a bit line of every bit line pairs and a low potential is applied to the other bit line of the bit line pairs. The pull-up circuits and the equalizer circuits are shut down. The current at a steady state is used to judge the normality of an SRAM chip.
申请公布号 US7079433(B1) 申请公布日期 2006.07.18
申请号 US20010860971 申请日期 2001.05.18
申请人 UNITED MICROELECTRONICS CORP. 发明人 CHEN CHIH-HUNG;WU TE-SUN
分类号 G11C7/00 主分类号 G11C7/00
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