发明名称 Integrated circuit structure formed by damascene process
摘要 An integrated circuit structure is formed using a damascene process that involves forming a trench or cavity for the structure in a temporary layer of material. A conductive material, such as copper, can then be deposited on the temporary layer to overfill the trench or cavity, and the excess conductive material can be removed by polishing down to the surface of the temporary layer. The integrated circuit structure can then be exposed by removing the temporary layer. One example of an integrated circuit structure that can be formed using this method is an upper electrode in an MRAM array. By using the process to form an upper electrode in an MRAM array, the process of forming a magnetic keeper around the upper electrode is advantageously simplified.
申请公布号 US7078239(B2) 申请公布日期 2006.07.18
申请号 US20030655666 申请日期 2003.09.05
申请人 MICRON TECHNOLOGY, INC. 发明人 TUTTLE MARK E.
分类号 H01L21/00;G11B5/147;G11C11/00;G11C11/15;H01L31/113;H01L43/12 主分类号 H01L21/00
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