发明名称 |
Method and apparatus for identifying optimized via locations |
摘要 |
Some embodiments of the invention provide a method of identifying a via between at least two layers of a multi-layer design layout. The method identifies a region within which the via should be located. It then formulates an optimization problem for identifying a location of the via in the region. It then solves the optimization problem to find an optimized location for the via.
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申请公布号 |
US7080329(B1) |
申请公布日期 |
2006.07.18 |
申请号 |
US20020288870 |
申请日期 |
2002.11.06 |
申请人 |
CADENCE DESIGN SYSTEMS, INC. |
发明人 |
TEIG STEVEN;CALDWELL ANDREW |
分类号 |
G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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