发明名称 System and method for a high-speed access architecture for semiconductor memory
摘要 A memory device is provided, which includes a first device, a second device, and a memory cell. The first device is electrically connected to a first plurality of wires. The first device is adapted to generate a small swing signal in the first plurality of wires. The second device is electrically connected to the first device by the first plurality of wires. The memory cell is electrically connected to the second device by a second plurality of wires. The second device is adapted to sense a small swing signal in the first plurality of wires, and to generate a full swing signal on the second set of wires in response to the small swing signal. The memory cell stores the full swing signal.
申请公布号 US7079427(B2) 申请公布日期 2006.07.18
申请号 US20040967447 申请日期 2004.10.18
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 HUANG CHIEN-HUA
分类号 G11C7/10 主分类号 G11C7/10
代理机构 代理人
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