发明名称 Testing a programmable logic device with embedded fixed logic using a scan chain
摘要 A circuit that includes a core device that is embedded within fixed interfacing logic circuitry that, in turn, is embedded in an FPGA fabric. The FPGA fabric may be configured into a test mode of operation to test either the embedded device or fixed logic devices formed within the fixed interfacing logic. While the FPGA is configured in a test mode, test circuitry and communication paths are made present within the fixed interfacing logic circuitry to facilitate the testing. Additionally, the test circuitry comprises isolation circuitry that is formed between various modules and circuits that are to be tested to isolate the device under test and to produce test signals thereto and there from during testing operations.
申请公布号 US7080300(B1) 申请公布日期 2006.07.18
申请号 US20040777327 申请日期 2004.02.12
申请人 XILINX, INC.;IBM 发明人 HERRON NIGEL G.;THORNE ERIC J.;WANG QINGQI;CORREALE, JR. ANTHONY;DICK THOMAS ANDERSON
分类号 G01R31/28 主分类号 G01R31/28
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