发明名称 Reliability enhancement process
摘要 A method of packaging a semiconductor component with a printed wiring board is disclosed. The method includes determining a first distance, applying a thin film onto a surface of the semiconductor component such that the thin film is spaced apart from a support of the semiconductor, applying a solder pad onto the printed wiring board, placing the semiconductor component with the thin film onto the printed wiring board, and positioning the thin film adjacent the solder pad.
申请公布号 US2006151581(A1) 申请公布日期 2006.07.13
申请号 US20050032526 申请日期 2005.01.10
申请人 MURPHY WILLIAM E;RIEGLE RYAN S;SHIELDS RICHARD;VOS DAVID L 发明人 MURPHY WILLIAM E.;RIEGLE RYAN S.;SHIELDS RICHARD;VOS DAVID L.
分类号 B23K31/02 主分类号 B23K31/02
代理机构 代理人
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