发明名称 PHYSICAL INFORMATION EXTRACTION REFLECTION METHOD, HIERARCHICAL CIRCUIT INFORMATION WITH PHYSICAL INFORMATION USING IT, AND CIRCUIT DESIGNING METHOD
摘要 PROBLEM TO BE SOLVED: To realize speeding up of circuit simulation and decrease of data quantity by reflecting in hierarchical circuit information the physical information extracted from layout information while maintaining a hierarchy structure, generating hierarchical circuit information with physical information, and thus reflecting to the circuit information of the hierarchical structure while maintaining accuracy. SOLUTION: This method includes a physical information extraction process for extracting information regarding physical condition in a single unit such as element, cell, such as a parasitic element, a parasitic coupling element, a shape parameter of a device, and performance or property of the device, from layout information, or physical information and a physical information reflection process for reflecting the physical information to the circuit information consisting of hierarchy and acquiring the hierarchical circuit information while maintaining the hierarchical structure. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006184938(A) 申请公布日期 2006.07.13
申请号 JP20040374591 申请日期 2004.12.24
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 HIRANO SHOZO;TANAKA MASAKAZU;ITO MASANORI
分类号 G06F17/50;H01L21/82 主分类号 G06F17/50
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