发明名称 |
Semiconductor device, wiring substrate, and method for manufacturing wiring substrate |
摘要 |
The reliabilities of a wiring substrate and a semiconductor apparatus are improved by reducing the internal stress caused by the difference of thermal expansion coefficients between a base substrate and a semiconductor chip. A wiring layer ( 5 ) is provided on one surface of a silicon base ( 3 ). An electrode as the uppermost layer of the wiring layer ( 5 ) is provided with an external bonding bump ( 7 ). A through-electrode ( 4 ) is formed in the base ( 3 ) for electrically connecting the wiring layer ( 5 ) and an electrode terminal. The electrode terminal on the chip mounting surface is bonded to an electrode terminal of a semiconductor chip ( 1 ) by an internal bonding bump ( 6 ). The thermal expansion coefficient of the silicon base ( 3 ) is equivalent to that of the semiconductor chip ( 1 ) and not more than that of the wiring layer ( 5 ).
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申请公布号 |
US2006151870(A1) |
申请公布日期 |
2006.07.13 |
申请号 |
US20050536025 |
申请日期 |
2005.05.23 |
申请人 |
NEC CORPORATION |
发明人 |
NISHIYAMA TOMOHIRO;TAGO MASAMOTO |
分类号 |
H01L23/12;H01L21/58;H01L23/14 |
主分类号 |
H01L23/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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