发明名称 ETCHING PROCESS TO AVOID POLYSILICON NOTCHING
摘要 A method for plasma assisted etching of a polysilicon containing gate electrode to reduce or avoid polysilicon notching at a base portion including providing a semiconducting substrate; forming a gate dielectric layer on the semiconducting substrate; forming a polysilicon layer on the gate dielectric; patterning a photoresist layer over the polysilicon layer for etching a gate electrode; carrying out a first plasma assisted etch process to etch through a major thickness portion of the polysilicon layer; carrying out a first inert gas plasma treatment; carrying out a second plasma assisted etch process to include exposing portions of the underlying gate dielectric layer; carrying out a second inert gas plasma treatment; and, carrying out a third plasma assisted etch process to fully expose the underlying gate dielectric layer adjacent either side of the gate electrodes.
申请公布号 US2006154487(A1) 申请公布日期 2006.07.13
申请号 US20050033912 申请日期 2005.01.11
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. 发明人 WANG SHIANG-BAU;LIN LI-TE;CHANG MING-CHING;CHEN RYAN C.;CHIU YUAN-HUNG;TAO HUN-JAN
分类号 H01L21/8234;H01L21/302 主分类号 H01L21/8234
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