Driver circuit for binary signals with two parallel driver branches between input and output nodes for amplifying binary data and/or control signals at outputs of digital components

摘要

First driver branch contains input stage (15) which connects, in response to first binary value of binary signal (Vx) applied to input node (X), output node (Y) to first logic potential (H) via first ohmic resistor (17). Second branch contains output stage (25) responsive to second binary value of binary signal applied to input node.Connection is effected via second ohmic resistor (27) with second logic potential (L). Duty cycle control (11,21) adjust signal travel time from input to output stage of first branch, relative to signal travel time from input to output of second branch.