发明名称 Stream processing in a video processor
摘要 A stream based memory access system for a video processor for executing video processing operations. The video processor includes a scalar execution unit configured to execute scalar video processing operations and a vector execution unit configured to execute vector video processing operations. A frame buffer memory is included for storing data for the scalar execution unit and the vector execution unit. A memory interface is included for establishing communication between the scalar execution unit and the vector execution unit and the frame buffer memory. The frame buffer memory comprises a plurality of tiles. The memory interface implements a first sequential access of tiles and implements a second stream comprising a second sequential access of tiles for the vector execution unit or the scalar execution unit.
申请公布号 US2006152520(A1) 申请公布日期 2006.07.13
申请号 US20050267599 申请日期 2005.11.04
申请人 GADRE SHIRISH;KARANDIKAR ASHISH;LEW STEPHEN D 发明人 GADRE SHIRISH;KARANDIKAR ASHISH;LEW STEPHEN D.
分类号 G06F13/28 主分类号 G06F13/28
代理机构 代理人
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