QUANTUM WELL TRANSISTOR USING HIGH DIELECTRIC CONSTANT DIELECTRIC LAYER
摘要
<p>A quantum well transistor or high electron mobility- transistor may be formed using a replacement metal gate process. A dummy gate electrode may be used to define sidewall spacers and source drain contact metallizations. The dummy gate electrode may be removed and the remaining structure used as a mask to etch a doped layer to form sources and drains self -aligned to said opening. A high dielectric constant material may coat the sides of said opening and then a metal gate electrode may be deposited. As a result, the sources and drains are self-aligned to the metal gate electrode. In addition, the metal gate electrode is isolated from an underlying barrier layer by the high dielectric constant material .</p>
申请公布号
WO2006074197(A1)
申请公布日期
2006.07.13
申请号
WO2006US00138
申请日期
2006.01.03
申请人
INTEL CORPORATION;DATTA, SUMAN;BRASK, JUSTIN;KAVALIEROS, JACK;METZ, MATTHEW;DOCZY, MARK;CHAU, ROBERT
发明人
DATTA, SUMAN;BRASK, JUSTIN;KAVALIEROS, JACK;METZ, MATTHEW;DOCZY, MARK;CHAU, ROBERT