NON-VOLATILE NAND MEMORY WITH ASYMMETRICAL DOPING PROFILE

摘要

Stacked gate structures (408A,480B,480C) for a NAND string are created on a substrate. Source implantations are performed at a first implantation angle to areas between the stacked gate structures. Drain implantation's are performed at a 5-second implantation angle to areas between the stacked gate structures. The drain implantations (498) create lower doped regions of a first conductivity type in the substrate on drain sides of the stacked gate structures. The source implantations (496) create higher doped regions of the first conductivity type in the substrate on source sides of the stacked gate structures. A B-halo (494) can be formed as well.