发明名称 Method and apparatus for enable/disable control of SIMD processor slices
摘要 Methods and apparatus provide for disabling at least some data path processing circuits of a SIMD processing pipeline, in which the processing circuits are organized into a matrix of slices and stages, in response to one or more enable flags during a given cycle.
申请公布号 US2006155964(A1) 申请公布日期 2006.07.13
申请号 US20050034693 申请日期 2005.01.13
申请人 发明人 TOTSUKA YONETARO
分类号 G06F9/30 主分类号 G06F9/30
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