发明名称 |
AN ARCHITECTURE FOR MULTI-CHANNEL VIDEO PROCESSING |
摘要 |
<p>One embodiment includes an apparatus for display of video data from a designated number of an N number of video channels. The apparatus comprises an N number of video decoders to receive the video data from the N number of video channels. A designated number of the N number of video decoders to decode the video data from the designated number of the N number of video channels. The apparatus also comprises a P number of video processing pipelines coupled to the N number of video decoders through a switch network. The switch network configured to connect any of the outputs from the N number of video decoders to any of the inputs into the P number of video processing pipelines.</p> |
申请公布号 |
EP1678946(A1) |
申请公布日期 |
2006.07.12 |
申请号 |
EP20040818315 |
申请日期 |
2004.10.27 |
申请人 |
HONEYWELL INTERNATIONAL INC. |
发明人 |
FYE, JAMES, C. |
分类号 |
H04N5/262;H04N5/445;H04N5/45;H04N7/15;H04N7/18;(IPC1-7):H04N5/445 |
主分类号 |
H04N5/262 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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