发明名称 Device for protecting a synchronous flip-flop of an elementary logic module against intrusion of errors
摘要 <p>The circuit has a control module (20) comprising encoding blocks (21, 22) respectively receiving functional and synchronous outputs (R, SR) from a logic module (10) and providing codes (C1, C2). A synchronous flip-flop (23) receives the code (C1) and provides a code (C3). A comparator (24) compares the codes (C2, C3) and provides an error signal (ER1) having an active value, when the codes are not identical.</p>
申请公布号 EP1571754(B1) 申请公布日期 2006.07.12
申请号 EP20050001617 申请日期 2005.01.27
申请人 STMICROELECTRONICS S.A. 发明人 PISTOULET, PIERRE
分类号 H03K19/003;G06F21/55 主分类号 H03K19/003
代理机构 代理人
主权项
地址
您可能感兴趣的专利