发明名称 Correlated double sampling modulation system with reduced latency of reference to input
摘要 A charge balancing modulation system for digitizing the output of a variable impedance sensor utilizes synchronous excitation of the input sensor and AC coupling of the analog input signal. In one embodiment, the modulation system includes a switched excitation source for exciting the input sensor and generating an input voltage step in response, and an integrator including an input capacitor, an amplifier and an accumulation capacitor. The input capacitor AC couples the input voltage step to the integrator to form an input charge. A reference charge packet is generated in a data dependent manner and coupled to the integrator simultaneously with the input charge. The integrator integrates charge associated with the sum of the input charge and the reference charge, when applied. The modulation system generates an output data stream exhibiting a ones density proportional to the magnitude of the average input voltage step.
申请公布号 US7075475(B1) 申请公布日期 2006.07.11
申请号 US20040917779 申请日期 2004.08.13
申请人 NATIONAL SEMICONDUCTOR CORPORATION 发明人 WAN JUN
分类号 H03M1/12;G06F7/64;G06G7/18;G06G7/19;H03M3/00 主分类号 H03M1/12
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