发明名称 Semiconductor memory having testable redundant memory cells
摘要 A semiconductor memory having a plurality of normal memory blocks and a redundant memory block, has a redundant replacement memory that stores identification information for a normal memory block that is a replacement target; a select signal generation unit that generates a block select signal on the basis of the redundant replacement memory identification information in response to a memory reset signal that is inputted to a reset terminal; and a memory block selection unit that selects the redundant memory block and enables input/output access thereto in place of the replacement-target normal memory block on the basis of the block select signal, wherein the memory block selection unit selects the redundant memory block in place of any normal memory block in response to a redundant select signal which is inputted to the reset terminal and differs from the memory reset signal.
申请公布号 US7075836(B2) 申请公布日期 2006.07.11
申请号 US20050044016 申请日期 2005.01.28
申请人 FUJITSU LIMITED 发明人 MAKI TAKASHI
分类号 G11C29/00;G11C7/00 主分类号 G11C29/00
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